The requirement for clock switching is present in the design of electronic circuits which necessitate at least two processing frequencies of distinct values, for example a high frequency and a low frequency. More often than not the existing switching circuits make it possible to toggle between two clock signals of distinct frequencies, but of fixed values F1 and F2 which cannot be modified. Within the framework of an enhancement of a product using such a switching circuit, a new requirement relating to a clock signal of frequency F3 which differs from the two available frequencies F1 and F2 may arise. Under the constraint of a reuse of the said switching circuit, the problem to be solved relates to the implementation of a solution outside this circuit which makes it possible, on the basis of the clock signal of frequency F1 or F2 and of a third clock signal of frequency F3 to perform a switching between the frequency F1 and the frequency F3. This switching solution must be compact and exhibit minimum consumption and the toggling of clocks must be done without generating glitches so as not to disturb the operation of the processor which is thereafter driven by the frequencies F1 or F3.
The existing solutions do not make it possible, on the basis of a first circuit for switching between two clocks of frequencies F1 and F2, to replace the frequency F2 with another frequency F3 and to perform glitch-free toggling.